Semiconductor News & Analysis Feed

Tier IV's participation in JST's next-generation edge AI semiconductor R&D program marks a significant development in the convergence of autonomous driving and semiconductor industries. This initiative, led by Japan's Science and Technology Agency (JST), aims to advance edge AI chip technology for a

On August 14, 2026, the Japan Science and Technology Agency (JST) launched a next-generation edge AI semiconductor research and development program, into which TIER IV, a leading company in autonomous driving, has joined. The initiative aims to advance the development of software-defined system-on-c

China has revised its regulations on the protection of integrated circuit (IC) layout designs, aiming to strengthen intellectual property safeguards and curb design imitation. The updated rules tighten originality requirements, registration procedures, and infringement remedies, making it harder for

Cadence and Intel Foundry have deepened their multi-year partnership to accelerate the development of next-generation chip designs on Intel's 14A process node. The collaboration leverages Cadence’s AI-powered EDA tools and design IP portfolio, combined with Intel’s advanced process and packaging exp

Synopsys has launched the first wave of its Multiphysics Fusion solutions, embedding Ansys' golden signoff analysis directly into timing signoff, design closure, multi-die, and analog workflows. This marks the first integrated product from Synopsys' $35 billion acquisition of Ansys, with early valid

RISC-V International CEO Andrea Gallo predicted at the MIPS Forum during Computex 2026 that RISC-V will become the default instruction set architecture for all new chip designs, marking its transition from academic project to industrial standard. This forecast underscores RISC-V's growing dominance

Synopsys and Samsung Foundry have extended their partnership to enhance Synopsys’ portfolio of AI-powered EDA tools, certified interface IP, and silicon test capabilities, aimed at accelerating the time-to-market for AI and multi-die chip designs. Announced during the Samsung Advanced Foundry Ecosys