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Taiwan Semiconductor Manufacturing Company (TSMC) has disclosed verification results for glass substrates, signaling a strategic acceleration in next-generation semiconductor packaging. These substrates are expected to overcome limitations of traditional plastic-based materials, particularly in warp

TSMC is accelerating its advanced packaging roadmap for AI chips, expanding CoWoS capacity while publicly disclosing new progress in glass substrate technology. This strategic move signals that next-generation packaging competition is shifting from traditional CoWoS toward more advanced solutions. T

As Moore's Law slows, advanced packaging has emerged as a critical enabler for enhancing chip integration and system performance. Glass substrates, with their low dielectric constant, low loss, high flatness, chemical stability, and thermal expansion coefficient matching silicon, are increasingly re

As AI chips continue to scale in size and complexity, demand for next-generation packaging solutions is rising, with glass substrates emerging as a key technology. According to reports, glass substrates are expected to enter early commercialization by 2027, ramp up production by 2029, and reach full