Semiconductor News & Analysis Feed

4669 articles
2026-05-28
gizmodo.com 2026-05-28 Gizmodo
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2026-05-28
asia.nikkei.com 2026-05-28 Nikkei Asia
Acer, HP and Lenovo on board for affordable laptops as component prices rise Qualcomm's Snapdragon C Platform chips are aimed at entry-level laptops priced around $300, a bet by the U.S. chipmaker that lower-cost AI PCs will catch on. (Qualcomm) TAIPEI -- Qualcomm Technologies is launching its first chip for budget PCs, as computer makers struggle with surging prices of CPUs and memory chips due
2026-05-28
news.google.com 2026-05-28 Stock Titan
2026-05-28
www.msn.com 2026-05-28 MSN
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2026-05-28
www.japantimes.co.jp 2026-05-28 The Japan Times
Taiwan prosecutors suspect that three individuals successfully smuggled at least one shipment of Nvidia artificial intelligence chips to China after first exporting them to Japan, people familiar with the matter said. The trio was detained last week by Taiwan’s Keelung District Prosecutors Office for allegedly falsifying documents related to exports of Super Micro Computer servers containing adva
2026-05-28
www.barrons.com 2026-05-28 Barron's
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2026-05-28
news.google.com 2026-05-28 FXLeaders
2026-05-28
www.eletimes.ai 2026-05-28 ELE Times
Search ELE Times Search HomeIndustryConsumerInfineon CoolGaN BDS Chips Splash Portable Power Footprint by 82% Electronics Semiconductors and Chips Industry Consumer News World News Infineon CoolGaN BDS Chips Splash Portable Power Footprint by 82% ELE Times News May 28, 2026 Infineon-CoolGaN Infineon Technologies AG expands its CoolGaN BDS 40 V G3 bidirectional switch (BDS) family with two new dev
2026-05-28
www.tomshardware.com 2026-05-28 Tom's Hardware
Tech Industry Manufacturing Semiconductors Chinese university builds 3D chip design tool tailored to Huawei's ‘LogicFolding’ architecture — 3D design delivers increased performance and better thermal management News By Luke James published 20 minutes ago China now has a prototype tool designed for vertical circuit stacking. (Image credit: Getty Images) Share this article 0 Join the conversatio
2026-05-28
tomshardware.com 2026-05-28 Luke James
The announcement came two days after Huawei presented LogicFolding and its accompanying Tau Scaling Law at ISCAS 2026.
2026-05-28
www.ad-hoc-news.de 2026-05-28 AD HOC NEWS
ASML, Presses ASML Presses Ahead with €16M Daily Buybacks as High-NA EUV Adoption Splits Chip Giants 28.05.2026 - 13:03:26 | boerse-global.de ASML continues aggressive share buyback, spending ~€16M daily, as High-NA EUV lithography splits customer base; Q1 revenue €8.8B, 2026 outlook €36-40B. ASML Presses Ahead with €16M Daily Buybacks as High-NA EUV Adoption Splits Chip Giants - Foto: über boer
2026-05-28
news.google.com 2026-05-28 AD HOC NEWS
2026-05-28
www.indexbox.io 2026-05-28 IndexBox
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2026-05-28
eetimes.com 2026-05-28
“Can Europe realistically compete on leading-edge fabs alone?” Maria Marced said. “No.”
2026-05-28
news.google.com 2026-05-28 EE Times
2026-05-28
www.msn.com 2026-05-28 MSN
No tariff schedule: Taiwan says the US has not set a date for Section 232 semiconductor tariffs. Preferential terms secured: A January trade deal guarantees most-favoured-nation treatment for Taiwanese chipmakers under any future tariffs. Wider trade benefits: The deal also cut or removed tariffs on various Taiwanese goods, retroactive from May 1.
2026-05-28
telecom.economictimes.indiatimes.com 2026-05-28 ET Telecom
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2026-05-28
www.indexbox.io 2026-05-28 IndexBox
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2026-05-28
www.indexbox.io 2026-05-28 IndexBox
In the domain of AI silicon, raw performance specifications convey only a portion of the overall picture. Marketing materials frequently emphasize headline figures like trillions of operations per second, tensor throughput, matrix dimensions, and accelerator density. However, engineers constructing these systems recognize a more complex reality: computational performance is only meaningful when da
2026-05-28
semiengineering.com 2026-05-28 Semiconductor Engineering
Multi-die assemblies give chip architects the option to change some dies while keeping the rest of the system intact, but which is best to keep? Despite initial design and verification challenges, chiplet-based architectures are proving to be a cost-effective way of reusing large portions of a design while staying current with the latest I/O protocols and logic. Early discussions about chiplets