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The RISC-V open standard and the emergence of RVA23 silicon now provide the necessary flexibility and modularity without the limitations of traditional proprietary systems.

RISC-V Open Instruction Set Architecture Data Center Server Chip Semiconductor Technology Open Source Ecosystem AI Accelerator Chip Architecture

SK Hynix's ADR won't be 'too much of a headwind’ for tech and U.S. equities: Standard Chartered - CNBC

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www.cnbc.com 2026-07-10 CNBC

JEDEC releases new SPHBM4 standard to slash AI memory costs

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tomshardware.com 2026-07-08 Anton Shilov

SPHBM4 promises HBM4-class bandwidth without usage of silicon interposer and CoWoS-like packaging.

JEDEC standard High Bandwidth Memory AI processors HBM4 SPHBM4 Memory technology Semiconductor industry Chip design

AI server demand tightens power device supply as lead times stretch to 270 days

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digitimes.com 2026-07-07

AI server demand is lifting shipments of motor-related power devices at Cystech Electronics, helping the Taiwanese MOSFET and diode designer grow first-half 2026 revenue despite memory shortages weighing on networking products. Wafer foundry and packaging capacity remain tight, with rush orders pushing standard lead times from 180 days to 270 days, according to supply chain sources.

Jensen Huang's leather jacket up for auction at Sotheby's for US$60,000 at most, matching Nvidia Blackwell AI chip price - The Standard (HK)

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www.thestandard.com.hk 2026-07-03 The Standard (HK)

Nvidia chief executive Jensen Huang's iconic black leather jacket reportedly will be up for auction at Sotheby's, with an estimated price of US$40,000 (HK$312,000) to US$60,000 - nearly the same as that of Nvidia's Blackwell artificial intelligence chip, according to Business Insider. The Tom Ford piece also features Jensen Huang's handwritten signature, the report said. Sotheby's confirmed that

NVIDIA Jensen Huang Auction Sotheby's AI Chip Blackwell Leather Jacket Tech Icon

Design of a Single Pair Ethernet System with Power over Data Lines (SPoE)

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eetimes.com 2026-07-01

Single Pair Ethernet is becoming increasingly popular in industrial networking due to the simplified cabling with just one twisted pair of wires. If power is also supplied via this, the SPE transmission standard with Power over Data Lines is unbeatable simple, but the implementation not trivial. The reference design for Single Pair Ethernet (SPE) with […]

Single Pair Ethernet Power over Data Lines Industrial Networking Würth Elektronik Ethernet Standard Wireless Communication Embedded Systems Industrial Automation

Steamroller becomes first prebuilt gaming PC to ship with SteamOS

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tomshardware.com 2026-06-29 Kunal Khullar

Steamroller is the first commercially available prebuilt gaming PC running SteamOS, pairing standard desktop components with future upgradeability.

SteamOS prebuilt gaming PC AMD Ryzen 9600X Radeon RX 7600 Steam Machine m-ATX chassis liquid cooling NVMe SSD

Qualcomm Forecasts Billions in Additional Revenue From New Data Center Solutions

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eetimes.com 2026-06-25

Qualcomm takes the data center by storm with networking, AI accelerators, and both custom and standard CPUs.

Data Centers AI Accelerators CPU Architecture Semiconductor Industry Qualcomm Arm Architecture Oryon Architecture HBC Memory Architecture

Q3 memory prices rose more than expected, and HBM profitability is projected to catch up with that of standard DRAM next year; Nomura has repeatedly raised its target prices for SK Hynix and Samsung. - 富途牛牛

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news.futunn.com 2026-06-25 富途牛牛

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Samsung eyes Galaxy Ultra for 2nm Exynos 2700

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digitimes.com 2026-06-24

Samsung Electronics' System LSI division is pressing its mobile business to expand adoption of the in-house Exynos 2700 processor beyond the standard Galaxy S27 and S27 Plus models and into the premium Galaxy S27 Ultra and Galaxy Z Fold 8, according to The Bell.

JEDEC approves SPHBM4 standard to broaden HBM4 packaging and boost glass substrate prospects

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digitimes.com 2026-06-24

JEDEC finalized a new HBM4 packaging specification called SPHBM4 that aims to broaden high bandwidth memory (HBM) use cases by reducing packaging complexity and cost, industry sources reported. According to ET News, the DRAM subcommittee completed its review, and the JEDEC board gave final approval, positioning the standard to influence AI semiconductor cost structures and substrate choices.

China's LineShine supercomputer tops TOP500, but AI lead remains unclear

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digitimes.com 2026-06-24

China's LineShine supercomputer debuted at No. 1 on the June 2026 TOP500 list, announced at the ISC 2026 conference in Hamburg, becoming the first system to sustain more than two exaflops on the standard HPL benchmark using CPUs only. The result marks the first time since 2017 that a China-based system has led the TOP500 ranking, and reflects Beijing's effort to present a frontier computing system

JEDEC Approves SPHBM4 to Break HBM’s Costly Packaging Bottleneck, Retaining HBM4-level Speeds With Standard Packages - Wccftech

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wccftech.com 2026-06-23 Wccftech

SPHBM4 is a new JEDEC standard that aims to solve the high cost and packaging concerns with existing HBM technologies. Almost all AI & HPC accelerators rolling out these days feature some form of HBM memory. The highest-end solutions are leveraging the latest HBM4 designs, and HBM4E is being sampled to the top chipmakers. But as demand continues to rise, and shortages persist in the premium DRAM

HBM JEDEC SPHBM4 High Performance Memory Packaging Technology AI Chips HPC Accelerators DRAM

Apple’s A21 Pro May Exclusively Use TSMC’s Improved 2nm ‘N2P’ Process While Keeping The Standard Version On The Older Node - Wccftech

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wccftech.com 2026-06-19 Wccftech

The slightly advanced 2nm ‘N2P’ process from TSMC is reportedly being used by Qualcomm and MediaTek, with both companies aiming to gain an advantage over Apple later this year. However, the Cupertino firm is expected to match its rivals’ competitiveness by adopting the same manufacturing process next year for the A21 Pro, but only the latter will receive preferential treatment for the improved tec

Apple TSMC 2nm process A21 Pro chip manufacturing semiconductor technology mobile processor Apple chips

Apple’s A21 Pro May Exclusively Use TSMC’s Improved 2nm ‘N2P’ Process While Keeping The Standard Version On The Older Node - Wccftech

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wccftech.com 2026-06-19 Wccftech

MOBILE RUMOR SEMICONDUCTOR Apple’s A21 Pro May Exclusively Use TSMC’s Improved 2nm ‘N2P’ Process While Keeping The Standard Version On The Older Node Omar Sohail • Jun 19, 2026 at 03:06am EDT Add Wccftech on Google Comments The slightly advanced 2nm ‘N2P’ process from TSMC is reportedly being used by Qualcomm and MediaTek, with both companies aiming to gain an advantage over Apple later this year

Apple TSMC 2nm process A21 Pro Semiconductor manufacturing Mobile processor Chip technology Supply chain

Nvidia and ABB Robotics advance partnerships, Standard Bots raises $200M - Manufacturing Dive

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www.manufacturingdive.com 2026-06-19 Manufacturing Dive

Nvidia and ABB Robotics advance partnerships, Standard Bots raises $200M In other news, robotics firms preview their products ahead of the Automate trade show next week in Chicago. Published June 18, 2026 Nathan Owens Reporter Share License Add us on Google A robot demonstration on the trade show floor at Automate 2025. Courtesy of Automate Listen to the article 6 min Automation is top of mind

Robotics Artificial Intelligence Industrial Automation Smart Manufacturing Semiconductor Chip Manufacturing AI Chips Manufacturing Innovation

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