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SPHBM4 promises HBM4-class bandwidth without usage of silicon interposer and CoWoS-like packaging.

Intel’s XBM patent proposes an HBM alternative that uses backend-transistor DRAM, UCIe chiplet links, and repair logic to reduce packaging costs and complexity.

Tech Industry Manufacturing Semiconductors Intel patent reveals new XBM memory architecture that ditches HBM's costly silicon interposer — backend-transistor DRAM stack uses UCIe links and built-in repair to ease AI's memory bottleneck News By Etiido Uko Published 2 days ago The patent was filed 18 months ago, and there's no further indication of ongoing development (Image credit: Intel) Share

Belgian research hub Imec has taken another step toward high-frequency chiplet-based systems, extending its 300mm RF silicon interposer platform to support system-level integration of III-V chiplets with Si-CMOS technology. The development targets emerging mmWave and sub-THz wireless applications, as well as high-speed signal handling for next-generation data centers.