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Huawei LogicFolding chip design aims to match 1.4nm by 2031 - qz.com

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qz.com 2026-05-26 qz.com

EMERGING TECHNOLOGIES Huawei is unveiling a new 3D chip design it says can close the gap with global leaders The Chinese tech giant says its new stacked-chip architecture can deliver transistor density equivalent to 1.4nm processes by 2031, without access to advanced lithography tools By Cris Tolomia Share to X Share to Facebook Share to Reddit Share to Email Share to Link Published 16 minutes ago

Huawei Chip Design 3D Stacking LogicFolding Semiconductor Process 1.4nm Advanced Manufacturing Chip Architecture

Nvidia sends blunt message on China AI chip demand - thestreet.com

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www.thestreet.com 2026-05-26 thestreet.com

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China's Huawei unveils new chip design approach - Xinhua

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english.news.cn 2026-05-26 Xinhua

SHANGHAI, May 26 (Xinhua) -- Chinese telecoms firm Huawei has unveiled its chip design approach at a major industry conference in Shanghai, referring to it as the Tau Scaling Law, "a new guiding principle for the future of semiconductors." The announcement signals a potential new path for sustained evolution when the traditional roadmap of Moore's Law -- the long-held industry belief that transis

Huawei Chip Design Semiconductor Tau Scaling Law Moore's Law Electronic System Optimization LogicFolding Transistor Density

AI Chip Stocks Jump as Qualcomm Explodes Higher, AMD Leads Semiconductor Rally - TradingView

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www.tradingview.com 2026-05-26 TradingView

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Huawei touts chip design breakthrough as answer to US sanctions - Light Reading

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www.lightreading.com 2026-05-26 Light Reading

Together, we power an unparalleled network of 220+ online properties covering 10,000+ granular topics, serving an audience of 50+ million professionals with original, objective content from trusted sources. We help you gain critical insights and make more informed decisions across your business priorities. China's Huawei is feeling chipper about a new way of designing semiconductors that could fr

Huawei US Sanctions Semiconductor Chip Design 3nm EUV Lithography TSMC SMIC

Microchip Launches 3.3 kV HV‑D3 mSiC® Power Modules to Enable Solid-State Transformers for AI Data Centers - Microchip Technology

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ir.microchip.com 2026-05-26 Microchip Technology

Microchip Launches 3.3 kV HV‑D3 mSiC® Power Modules to Enable Solid-State Transformers for AI Data Centers May 26, 2026 8:00 am EDT Download as PDF New silicon carbide modules deliver the required thermal performance and efficiency for SSTs to increase power available for token generation CHANDLER, Ariz., May 26, 2026 (GLOBE NEWSWIRE) -- Microchip Technology (Nasdaq: MCHP) today announces the ava

Silicon Carbide Power Modules Solid-State Transformers AI Data Centers High Voltage Power Applications Thermal Performance Efficiency mSiC Technology

Huawei details fresh chip design philosophy - Mobile World Live

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www.mobileworldlive.com 2026-05-26 Mobile World Live

GREATER CHINA HUAWEI May 26, 2026 Huawei details fresh chip design philosophy By Chris Donkin SHARE The president of Huawei’s semiconductors business department He Tingbo outlined a design methodology set to be used in its upcoming Kirin chips, an approach she backed to provide the means for it to continue to deliver cutting-edge silicon for mobile devices. In a speech delivered at the 2026 IEE

Huawei chip design semiconductor Kirin chip Tau Scaling law LogicFolding transistor density system performance

ASML’s Balancing Act: Chip Diplomacy Opens Doors as Huawei Maps an EUV-Free Future - AD HOC NEWS

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www.ad-hoc-news.de 2026-05-26 AD HOC NEWS

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Power chips for AI data centers to be showcased at PCIM Europe 2026 - Stock Titan

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news.google.com 2026-05-26 Stock Titan

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Magnachip to Showcase MV MOSFET Portfolio for AI Servers and Data Centers Alongside Its Broader Power Semiconductor Portfolio at PCIM Europe 2026 - Morningstar

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www.morningstar.com 2026-05-26 Morningstar