Semiconductor News & Analysis Feed

Taiwan Semiconductor Manufacturing Company (TSMC) announced progress in next-generation 2D transistor technology and collaboration with Imec and ASML to fabricate 2D material devices at a 50nm pitch. Concurrently, TSMC is advancing Chip On Panel on Substrate (CoPoS) packaging to improve wafer utiliz

Taiwan Semiconductor Manufacturing (TSMC) announced significant advancements in AI chip technology on June 23, 2026, focusing on its CoWoS advanced packaging platform and the integration of 2D material transistors. These developments reinforce TSMC's central role in the AI chip supply chain, offerin

imec, ASML, and TSMC have achieved a significant breakthrough in 2D transistor technology, demonstrating complementary n- and p-type transistors with atomically thin channels on a 300mm wafer at a 50nm contacted poly pitch. Presented at the IEEE/JSAP Symposium on VLSI Technology and Circuits, the wo

ASML, TSMC, and imec have achieved a significant breakthrough in advancing two-dimensional (2D) semiconductor materials from laboratory research to high-volume manufacturing. This collaboration represents a crucial step toward commercializing 2D materials, which offer unique electronic properties fo

ASML, TSMC, and imec have achieved scalable 2D transistor manufacturing on 300mm wafers with a 50nm pitch, marking a significant step toward industrial adoption of post-silicon logic devices. Presented at the 2026 IEEE/JSAP VLSI Symposium, the demonstration features both nFETs and pFETs using a CMOS