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IBM's new 0.7nm-class fabrication process uses nanostack transistors, requires 2x more FEOL steps for massive improvements in performance, power, and area.

On June 25, IBM unveiled what it calls the world's first sub-1nm chip technology: a 0.7nm — or 7 angstrom — transistor architecture built on an entirely new 3D platform called Nanostack. The announcement, timed to the VLSI 2026 symposium, marks the first time logic technology has extended below the 1nm node and, IBM says, opens a roadmap of at least a decade of further semiconductor scaling.

INFRASTRUCTURE semiconductors ibm sub 1nm IBM debuts 0.7nm Nanostack with nearly 100B transistors 5 sources | June 25, 2026 8.5 Relevance Score Photo: storagereview.com · rights & takedowns QUICK SUMMARY Hide IBM unveiled the world's first sub-1 nanometer chip technology on June 25, 2026, using a new 0.7nm "Nanostack" 3D transistor architecture (also called 7 angstrom). The chip packs nearly 100

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