Semiconductor News & Analysis Feed

Applied Materials announced a new equipment platform aimed at addressing the memory bandwidth and energy-efficiency bottleneck confronting AI computing, unveiling tools across DRAM, advanced packaging, and process control to help chipmakers boost yields and accelerate mass production. The company said the platform combines materials engineering with process integration to support high-bandwidth me

Co-packaged optics (CPO) is rapidly emerging as a foundational architecture for next-generation AI infrastructure. With Nvidia's latest Scale-Up CPO switch roadmap now taking shape, bandwidth per AI rack is set to increase from approximately 130 TB/s in the Blackwell generation to more than 1 PB/s in the Feynman era, spanning Blackwell, Rubin, Rubin Ultra, and Feynman platforms. As a result, the g

The AI wave is rapidly reshaping the global semiconductor supply chain, and that upheaval is opening a new growth chapter for Taiwan's LED industry. As Taiwan's LED makers move away from the price wars of the consumer market, Nvidia's push to upgrade AI transmission standards to 1.6T, 3.2T, and beyond is exposing the physical limits of copper wiring, making scale-up the first battlefield in the co

Astera Labs expects its Scorpio switch-chip business to become its largest revenue contributor by the end of 2026, marking a shift for the cloud AI connectivity chip supplier as demand grows for scale-up infrastructure in AI clusters.

Marvell Technology used its first-quarter fiscal 2027 earnings call to detail accelerating progress across optical, copper, and silicon photonics-based connectivity, signaling that AI infrastructure is shifting from compute-centric bottlenecks toward networking-driven architectures. The company's expanded interconnect portfolio, new silicon photonics acquisition, and emerging scale-up switch progr

Delos Data wants to enable practical scale-up domains of 1000+ GPUs in flexible topology designs

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