SemiPulse — Semiconductor Intelligence

Applied Materials strikes NEXX deal as AI chip packages shift to larger panels - Stock Titan

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www.stocktitan.net 2026-05-04 Stock Titan

Designing Chips In The Context Of Rapidly Evolving AI

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semiengineering.com 2026-05-04 Ann Mutschler

Long‑running agents, tool-calling LLMs, and multimodal chaos are rewriting edge compu...

AI chip design Edge AI Chip architecture Computational performance Memory hierarchy Data movement RAS technology Multimodal AI

Nvidia’s $1 million problem is getting worse in China - thestreet.com

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www.thestreet.com 2026-05-03 thestreet.com

CHIPS Act: Semiconductor Industry - Deloitte

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www.deloitte.com 2026-05-03 Deloitte

User Clip: House Debate, CHIPS Act - C-SPAN

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www.c-span.org 2026-05-03 C-SPAN

Four major smartphone brands hike India prices amid chip shortage - MSN

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www.msn.com 2026-05-03 MSN

NoC Coherency Challenges Balloon With AI SoCs And Chiplets

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semiengineering.com 2026-04-30 Liz Allan

Complex chips need coherent and non-coherent sub-NoCs to ensure efficient data paths. C...

Network-on-Chip AI SoC Chiplets Cache Coherency Data Movement System Integration Multi-die Design NoC Architecture

Athos Scraps Multi-Vendor Roadmap, Plans Chiplet Tape-Out

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eetimes.com 2026-04-30 Sally Ward-Foxton

The startup has ditched multi-vendor chiplets for a powerful in-house design, promising safety, scalability, and aggressive pricing.

Chip Design Functional Safety Automotive Chips Chiplet Autonomous Driving Semiconductor Manufacturing Chip Packaging Supply Chain

Can Edge AI Keep Up?

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semiengineering.com 2026-04-23 Ann Mutschler

As models evolve faster than silicon cycles, experts weigh how much adaptability archit...

Edge AI AI chips Heterogeneous architecture Model updates Computing power Power consumption Software toolchain AI processors

Why Chip Sovereignty Is No Longer About Chips—But Systems

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eetimes.com 2026-04-23 Pat Brans

Exclusive interviews with Mark Papermaster, CTO of AMD, and Chris Miller, author of “Chip War” and professor at Tufts University

Semiconductor Industry AI Accelerators System-Level Design Chip Sovereignty Advanced Packaging Chip Manufacturing Global Supply Chain Computing Architecture

TSMC Unfolds Map for Process, Packaging Tech

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eetimes.com 2026-04-22 Alan Patterson

TSMC unveils chip tech roadmap, slashing AI power use and boosting density.

TSMC Advanced Process AI Chip 3nm EUV Lithography Packaging Technology Photonics Data Center

The Changing ASICs Landscape: the Shift Toward Chip Disaggregation

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eetimes.com 2026-04-21 Padma Nagaraja

ASIC design shifts to modular, multi-die systems to beat AI-driven complexity.

ASIC Chip Disaggregation AI Chips SoC Chip Design Advanced Packaging Multi-die Integration Performance Optimization

YMTC’s NAND Design Surprise Alongside a New Fab

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eetimes.com 2026-04-20 Majeed Ahmad

China’s memory underdog defies sanctions by building a fab that mostly sources equipment, materials, and tools locally.

YMTC NAND flash 3D NAND semiconductor self-reliance Chinese chip industry DRAM AI infrastructure Fab construction

Positron AI Enters Nvidia Turf With Oracle Deal

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eetimes.com 2026-04-20 Alan Patterson

Positron AI storms Nvidia’s data center turf with Oracle deal and Asimov chip.

AI chip Nvidia rivalry Oracle partnership AI data center inference computing chip design startup semiconductor industry

TSMC Chases Soaring AI Demand

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eetimes.com 2026-04-17 Alan Patterson

TSMC slams the gas to expand chip production for AI giants, but shortages loom.

TSMC AI chips Semiconductor manufacturing 3nm process 2nm process Chip capacity AI demand Global chip competition

EU DARE Project Is Scrambling to Replace Codasip

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eetimes.com 2026-04-17 Pablo Valerio

EU DARE project explores alternatives after Codasip divestment creates uncertainty around roadmap and architectural direction.

EU Semiconductor Initiative DARE Project RISC-V Architecture European Supercomputing Semiconductor Supply Chain Secure Chips EDA Tools European Tech Sovereignty

Chiplet Standards Aim For Plug-n-Play

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semiengineering.com 2026-04-16 Bryon Moyer

They're necessary, but insufficient for a marketplace.

Chiplet Standardization Plug-and-Play Semiconductor Industry System Architecture Interoperability Packaging Technology Chiplet Marketplace

AI Growing Impact On Chip Design And EDA Tools

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semiengineering.com 2026-04-15 Ed Sperling

Demand for faster design and more automation grows from key customers.

AI Chip Design EDA Tools AI-Enabled Data Center Semiconductor Industry AI Algorithms Automated Design

BSC Spinoff to Secure Chips for Critical Infrastructure

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eetimes.com 2026-04-14 Pablo Valerio

BSC and UPC launch a spin-off creating auditable processor architecture for European critical infrastructure.

Semiconductor Supply Chain European Tech Sovereignty Critical Infrastructure Security Chip Design Secure Chips RISC-V Architecture Hardware Auditing EU Policy

Three Misconceptions About the $402B Semiconductor Foundry Industry

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eetimes.com 2026-04-13 Pierre Cambou

Unpack the $402B semiconductor foundry industry myths—discover who really dominates and why global alliances drive the chips in your life.

Semiconductor Foundry TSMC Advanced Node Global Supply Chain AI Chips Industry Landscape Geopolitics Semiconductor Market