Semiconductor News & Analysis Feed

SK Hynix is reportedly hiring engineers for 3D-stacked DRAM-on-Logic development, signaling a strategic move to support on-device AI applications. This advanced memory architecture integrates DRAM directly on top of system-on-chip (SoC) dies, offering shorter interconnects, higher data I/O channels,

IBM has unveiled a new 3D-stacked 0.7nm chip design, dubbed the 'nanostack' architecture, which could enable processor geometries below 1 nanometer. This advancement allows for nearly 100 billion transistors to be packed into a fingernail-sized area, doubling the density of IBM's previous 2nm chip.

IBM has unveiled its new 0.7nm chip design, dubbed the 'nanostack' architecture, which promises to fit nearly 100 billion transistors onto a fingernail-sized chip area. This advancement, developed amid rising demand for processing power in AI applications, outperforms IBM's previous 2nm chip by 50%