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IBM Just Shattered Moore's Law With Sub-1 Nanometer Chips by Zak Killian — Thursday, June 25, 2026, 01:55 PM EDT Comments IBM today announced what it calls the world's first sub-1 nanometer chip technology, unveiling a new 0.7nm (7 angstrom) semiconductor process built around an entirely new transistor architecture dubbed "nanostack." The announcement is significant not only because it pushes se

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YORKTOWN HEIGHTS, NY, June 25, 2026 – IBM (NYSE: IBM) today unveiled a major semiconductor breakthrough with the introduction of the world’s first sub-1 nanometer (nm) chip technology, featuring a revolutionary transistor architecture at the 0.7 nm, or 7 angstrom node. The achievement marks a landmark moment for an industry facing the physical limits of traditional chip scaling. Semiconductors pla

IBM Corp. today unveiled what it says is the world’s first sub-one-nanometer chip technology, a research breakthrough that it said will fuel the next 10 years of semiconductor development and pave the way to atomic-level chip design. The new technology is based on a transistor architecture IBM calls nanostack, designed for the 0.7-nanometer, or seven-angstrom, node. IBM said the architecture can

Samsung Electronics has demonstrated a 3D stacked transistor structure with a 42-nanometer gate pitch, a research milestone that extends vertical integration, long used in memory chips, into logic semiconductors.

MAtek reported May 2026 revenue of NT$544 million (US$17.23 million), a 26.87% increase year-over-year and a 0.69% increase month-over-month, marking its third consecutive month of record sales, the firm announced. For the first five months of 2026, revenue reached NT$2.51 billion, up 19.01% from the same period in 2025, with the company's leadership attributing growth to demand for outsourced mat

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Samsung Electronics opened its annual foundry forum in Silicon Valley on May 28, with customer interest in its advanced semiconductor processes showing signs of recovery amid improving market conditions. This year's SAFE Forum is expected to draw stronger participation from customers using leading-edge manufacturing nodes, particularly the 4-nanometer and 8-nanometer processes. Multiple industry

As Moore's Law nears its limits, Huawei is promoting its "Tau (τ) Law" as a post-Moore chip framework that shifts the focus from nanometer process nodes to shorter signal transmission times across electronic systems.

① The Tao (τ) Law proposes replacing “geometric scaling” with “time (τ) scaling” as the new guiding principle for the evolution of semiconductors and electronic systems. ② Based on the Tao (τ) Law, Huawei has already designed and mass-produced 381 chip models. The Kirin chip, set to debut in the fall of 2026, will be the first to adopt Logic Folding technology. According to a report by The Scienc

Skip to main content Editions Newsletter Donations e-Paper About US Subscribe Sign in SECTIONS Friday, May 22, 2026 HOME NEWS VIEWPOINTS US CHINA WORLD LIFE HEALTH Subscribe Newsletter Truth, Inspiration, Hope. Home » US » How Taiwan Kept TSMC’s 3-Nanometer Chip Line at Home During Trump’s First Term How Taiwan Kept TSMC’s 3-Nanometer Chip Line at Home During Trump’s First Term By Li Jingyao Pu