Semiconductor News & Analysis Feed

Synopsys has launched its first multiphysics fusion solutions to address the growing complexity in advanced semiconductor design. By integrating electronic design automation (EDA) tools with multiphysics analysis capabilities from Ansys, the new portfolio enables engineers to tackle increasingly com

Synopsys has unveiled its first multiphysics fusion solutions, marking a significant advancement in accelerated chip design processes. This breakthrough integrates multiple physical field simulation technologies, enabling simultaneous handling of thermodynamic, electrical, and mechanical physics phe

Synopsys has launched Multiphysics Fusion solutions to address the growing complexity in advanced chip design. This innovative tool suite integrates multiple physics simulations to provide comprehensive design verification capabilities for chip engineers. As semiconductor process nodes advance towar

Cadence Design Systems and Samsung Foundry have expanded their partnership to focus on advanced chip design tools and intellectual property (IP) for next-generation semiconductors, particularly those built on Samsung's second-generation 2nm process. The collaboration aims to deliver a comprehensive

India's semiconductor industry achieves a significant milestone with C2i Semiconductor's successful tape-out of an AI power chip, marking a substantial step forward in the country's advanced chip design capabilities. This breakthrough demonstrates India's growing technological prowess and strategic

Indian semiconductor startup C2i Semiconductors has completed the tape-out of a smart power stage chip designed for artificial intelligence infrastructure, marking a significant milestone in India's ambition to develop advanced semiconductor products domestically. This achievement represents a cruci

Faced with ongoing U.S. sanctions restricting access to advanced semiconductor technologies, Huawei is charting a new course in chip design that challenges conventional approaches. The company aims to achieve transistor densities comparable to 1.4-nanometer processes by 2031, pushing the limits of c