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Qualcomm Pursues Tenstorrent at Up to $10 Billion: RISC-V Bet on Nvidia’s Blind Spot - Tech Times

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www.techtimes.com 2026-06-17 Tech Times

By Eloise Jones Published: Jun 17 2026, 11:16 AM EDT Share on Facebook Share on Twitter Share on LinkedIn Share on Reddit Share on Flipboard Share on Pocket logo of US Semiconductor company Qualcomm in the Alpine resort of Davos during the World Economic Forum (WEF) annual meeting. The World Economic Forum takes place in Davos from January 19 to January 23, 2026. INA FASSBENDER/GETTY IMAGES Qual

Semiconductor AI Chip RISC-V Qualcomm Tenstorrent NVIDIA Chip Design Data Center

Zhihe A210 octa-core RISC-V SoC with 12 TOPS NPU powers SoM-based development board - CNX Software

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www.cnx-software.com 2026-06-17 CNX Software

POSTED ON JUNE 17, 2026 BY JEAN-LUC AUFRANC (CNXSOFT) - NO COMMENTS ON ZHIHE A210 OCTA-CORE RISC-V SOC WITH 12 TOPS NPU POWERS SOM-BASED DEVELOPMENT BOARD Zhihe A210 octa-core RISC-V SoC with 12 TOPS NPU powers SoM-based development board Last year, we noted three upcoming high-performance RISC-V SoCs to watch out for: Zhihe A210, SpacemiT K3, and UltraRISC UR-DP1000. The K3 has already been laun

RISC-V AI chip Edge AI SoM NPU Zhihe A210 Neural Processing Unit Embedded System

Qualcomm mulls taking over Jim Keller's Tenstorrent, report claims

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tomshardware.com 2026-06-16 Anton Shilov

Qualcomm is in talks to buy RISC-V-based AI accelerator and CPU developer Tenstorrent for $8 billion - $10 billion.

Qualcomm Tenstorrent Jim Keller AI processor RISC-V Semiconductor acquisition AI accelerator Chipmaking

Qualcomm said to be circling AI chip biz Tenstorrent in $10B RISC-V power play - The Register

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www.theregister.com 2026-06-16 The Register

SYSTEMS Qualcomm said to be circling AI chip biz Tenstorrent in $10B RISC-V power play Potential takeover would represent significant commitment to the open instruction set architecture Dan Robinson 1 Published Tue 16 Jun 2026 // 11:15 UTC Qualcomm is reportedly moving to buy AI chip firm Tenstorrent, an acquisition that could prove a major boost to the RISC-V ecosystem. This comes from The I

Qualcomm Tenstorrent RISC-V AI chips Datacenter Semiconductor acquisition Chip design ARM

RISC-V Silicon in the Jungle Could Save the Amazon - EE Times

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news.google.com 2026-06-16 EE Times

RISC-V Silicon in the Jungle Could Save the Amazon

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eetimes.com 2026-06-16 Pablo Valerio

Researchers at the University of São Paulo use RISC-V to build the Internet of Trees, a real-time monitoring network for the Amazon rainforest.

RISC-V IoT Forest Monitoring Sustainable Electronics Bioenergy Sensor Network Edge Computing Carbon Neutrality

Baya Systems partners with Openchip for RISC-V systems - SDxCentral

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www.sdxcentral.com 2026-06-15 SDxCentral

Baya Systems partners with Openchip for RISC-V systems By tapping into Baya’s data-movement platform, Openchip expects to reduce development risk, cut time-to-market, and optimize power-performance-area at scale June 15, 2026 By Yoana Cholteeva, SDxCentral Have your say Facebook Twitter LinkedIn Reddit Email Share – Thinkstock / donfiore Semiconductor company Openchip plans to license Baya’s da

RISC-V Semiconductor Design Data Movement Platform Network-on-Chip SoC Semiconductor IP AI Hardware Chiplet

Linux 7.1 Release – Main changes, Arm, RISC-V, and MIPS architectures - CNX Software

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news.google.com 2026-06-15 CNX Software

Fault Injection Framework Targets RISC-V Security Weak Spots - Semiconductor Engineering

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semiengineering.com 2026-06-15 Semiconductor Engineering

Researchers from Politecnico di Torino and CEA-List published a technical paper titled “InjectV: Modeling Fault Injection Attacks in RISC-V Simulation Environment.” “Fault Injection Attacks (FIAs) are a significant threat to hardware security, capable of compromising systems by inducing malicious faults in computation or storage. Evaluating resilience against such attacks is challenging due to th

RISC-V Hardware Security Fault Injection Attack Simulation Environment gem5 Vulnerability Assessment Computational Security Chip Design

Red Hat Releases Second Developer Preview Of RHEL 10 For RISC-V - Phoronix

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news.google.com 2026-06-12 Phoronix

Fortior FU75xx dual-core motor control MCU family combines 32-bit RISC-V core with 2nd-gen Motor Engine (ME2) core - CNX Software

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www.cnx-software.com 2026-06-12 CNX Software

POSTED ON JUNE 12, 2026 BY JEAN-LUC AUFRANC (CNXSOFT) - 1 COMMENT ON FORTIOR FU75XX DUAL-CORE MOTOR CONTROL MCU FAMILY COMBINES 32-BIT RISC-V CORE WITH 2ND-GEN MOTOR ENGINE (ME2) CORE Fortior FU75xx dual-core motor control MCU family combines 32-bit RISC-V core with 2nd-gen Motor Engine (ME2) core Motor driver IC specialist Fortior Technology has recently introduced the FU75xx dual-core motor con

Motor Control MCU RISC-V Core Dual-Core Processor FOC Control Automotive Electronics Industrial Automation Smart Home Appliances New Energy Vehicles

Openchip Adopts Baya Systems WeaveIP Fabric for AI and RISC-V Platforms - Embedded Computing Design

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embeddedcomputing.com 2026-06-12 Embedded Computing Design

Openchip Adopts Baya Systems WeaveIP Fabric for AI and RISC-V Platforms By Chad Cox PRODUCTION EDITOR EMBEDDED COMPUTING DESIGN June 11, 2026 NEWS Image Credit: Baya Systems and Openchip Baya Systems and Openchip announced the companies have entered a strategic partnership. Openchip is licensing Baya Systems’ data-movement platform and Network-on-Chip (NoC) fabric technology to offer solutio

Semiconductor Design AI Computing Platforms RISC-V Architecture Network-on-Chip Data Movement Optimization Chip Development Tools Intelligent Compute Systems Chip Integration Technology

RISC-V Targets Data Centers, Edge AI, Space - EE Times

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news.google.com 2026-06-11 EE Times

Openchip taps Baya Systems data-movement platform for RISC-V systems - SiliconANGLE

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siliconangle.com 2026-06-11 SiliconANGLE

Semiconductor fabric intellectual property company Baya Systems Inc. today announced that European chip and artificial intelligence systems firm Openchip & Software Technologies S.L. has licensed its data-movement platform and network-on-chip fabric technology to develop intelligent compute systems for next-generation artificial intelligence workloads. Under the partnership, Openchip will use Bay

Semiconductor IP RISC-V architecture Chip design Data movement AI computing systems Chip interconnect European market expansion Chiplet technology

RISC-V Targets Data Centers, Edge AI, Space

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eetimes.com 2026-06-11 Pablo Valerio

"RISC-V is now," said Andrea Gallo, CEO of RISC-V International, during his keynote at this week's RISC-V Summit Europe 2026 in Bologna.

RISC-V Data Center Edge AI Space Computing Open Instruction Set Semiconductor Ecosystem Server Platform AI Inference

Vortex expands open RISC-V graphics - Jon Peddie Research

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www.jonpeddie.com 2026-06-11 Jon Peddie Research

Researchers at Georgia Tech continue to advance Vortex, an open-source RISC-V GPU project designed to support both graphics and compute workloads. The latest Vortex 3.0 release introduces major architectural enhancements, including a fixed-function graphics pipeline, Vulkan support, tensor computing improvements, and new scheduling capabilities. These additions expand Vortex beyond its original Op

RISC-V Open Source GPU Graphics Processing Unit Vortex Project Georgia Tech Graphics Pipeline Tensor Computing AI Acceleration

Michael Chapman, CEO of Cortus, on RISC-V, AI, and Europe’s semiconductor future - eeNews Europe

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www.eenewseurope.com 2026-06-11 eeNews Europe

Michael Chapman, President, CEO, and Co-founder of Cortus, has worked in processor design since the early days of modern semiconductor development. Over the course of his career, he has contributed to projects ranging from automotive microcontrollers and CAN technology to processor architectures and system-level design tools. In 2005, he co-founded Cortus, a company focused on embedded processor I

RISC-V Semiconductor Processor Design European Semiconductor AI Chip Embedded Systems Chip Architecture Cortus

Linux 7.2 To Enable ESWIN SoC Support By Default For RISC-V Kernel Builds - Phoronix

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www.phoronix.com 2026-06-11 Phoronix

Linux 7.2 To Enable ESWIN SoC Support By Default For RISC-V Kernel Builds Written by Michael Larabel in RISC-V on 10 June 2026 at 02:42 PM EDT. Add A Comment An important one-liner is set to come for Linux 7.2 to enable ESWIN SoC support by default for RISC-V kernel builds. This change will allow default RISC-V kernel builds in turn to boot on the likes of SiFive's HiFive Premier P550 developer bo

Linux kernel RISC-V ESWIN SoC SiFive open source semiconductor embedded systems chip design

Open-Source RISC-V GPU Vortex 3.0 Adds Full 3D Pipeline, Vulkan, ASIC Flows - Tech Times

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www.techtimes.com 2026-06-11 Tech Times

By Kyle Belmonte Published: Jun 10 2026, 14:07 PM EDT Share on Facebook Share on Twitter Share on LinkedIn Share on Reddit Share on Flipboard Share on Pocket Vortex VORTEX.CC.GATECH.EDU Georgia Tech released Vortex 3.0 on June 9, 2026, completing what may be the most capable openly synthesizable GPU in existence: a RISC-V-based design that now pairs a full fixed-function 3D graphics pipeline wit

Open Source GPU RISC-V Vulkan 3D Graphics Pipeline ASIC Flow Machine Learning Acceleration Texture Units Rasterizer

NextSilicon Productizes Arbel RISC-V Core Into 64-Core Enterprise Processor - Quantum Zeitgeist

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quantumzeitgeist.com 2026-06-10 Quantum Zeitgeist

ARTIFICIAL INTELLIGENCE, HIGH PERFORMANCE COMPUTING NextSilicon Productizes Arbel RISC-V Core Into 64-Core Enterprise Processor June 10, 2026 BY IVY DELANEY NextSilicon is expanding beyond acceleration, announcing plans to productize its Arbel RISC-V core into 64-core and 128-core enterprise processors designed for artificial intelligence and high-performance computing. Originally conceived as th

RISC-V Artificial Intelligence High Performance Computing CPU Architecture Semiconductor Chip Enterprise Processor NextSilicon TSMC

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