[News] Samsung Files New HBM Dummy Die Patent to Enhance High-Stack Reliability; Seen as Aimed at 16-Layer HBM5 - TrendForce

As the semiconductor industry advances toward higher-layer HBM technologies, Samsung has filed a new patent aimed at enhancing the reliability of high-stack memory packaging. The patent focuses on add... Read original →

Samsung’s new HBM5 dummy die patent isn’t incremental—it’s a preemptive strike against the physical limits of high-stack packaging. Technically, its terraced die design and deep groove sawing will force dicing equipment vendors like DISCO to recalibrate precision parameters, while pressuring EMC suppliers to reformulate compounds for matched CTE. From a compliance angle, as U.S. and EU export controls tighten, such proprietary packaging IP raises barriers for second-tier players, concentrating supply risk among few integrated giants. Competitively, SK hynix will likely accelerate hybrid bonding yield ramp, Micron may pivot toward HPB alternatives, and Taiwan, China-based OSATs face mounting cross-licensing pressure. Within 12–24 months, this innovation becomes the make-or-break factor for HBM5 commercialization: firms unable to manage warpage beyond 16 layers will be purged from the AI memory race, shifting industry consolidation from chips to packaging ecosystems.