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Meta fights soaring hardware costs by reusing old DDR4 server memory in new DDR5-only servers

tomshardware.com 2026-06-30 Anton Shilov
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DDR5 memoryDDR4 memoryCXL protocolASIC chipserver memory expansionmemory cost reductionsemiconductor technologydata center optimizationmemory pool extensionmemory bandwidthserver architecturehyperscale data centers
News Summary
As DDR5 memory prices surge due to high demand, Meta is innovating by reusing legacy DDR4 modules in new DDR5-only servers to cut costs. The company developed the Vistara ASIC to bridge DDR4 RDIMMs to... Read original →
Industry Analysis
Meta’s DDR4 reuse via the Vistara ASIC is a surgical strike against runaway memory costs, not a stopgap. Technically, it accelerates CXL ecosystem maturity and may delay JEDEC’s DDR4 phaseout. From a compliance angle, reliance on legacy RDIMMs heightens supply chain fragility—especially if DRAM output from Taiwan, China or Korea faces geopolitical disruption, turning NUMA-based tiering into a vulnerability multiplier. Competitively, NVIDIA and AMD will likely enhance heterogeneous memory support in GPUs/CPUs, while Panmnesia’s 64-node CXL fabric directly challenges Meta’s vertical integration. Over the next 18 months, CXL 3.2/4.0 will become the new battleground, with RISC-V-based open memory controllers offering smaller hyperscalers a viable alternative.
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