Chinese fab SMIC's 7nm metal pitch beats Intel 18A but lags 38% on density, teardown finds — Huawei's sanctions-beating HiSilicon Kirin 9030 is the first subject of SemiAnalysis's new teardown lab

SMIC's third-generation 7nm process achieves a metal pitch of 32.5nm, surpassing Intel's 18A node at 36nm, but overall transistor density lags by 38%. This finding comes from SemiAnalysis's first tear... Read original →

SMIC’s DUV-based 32.5nm metal pitch—achieved without EUV—exposes a critical bottleneck: while interconnect scaling rivals Intel 18A, 38% lower density reveals the limits of quadruple patterning. This accelerates China’s push for domestic EDA, photoresists, and CMP slurries, while pressuring TSMC and Samsung to lock in EUV capacity ahead of 2nm. U.S. sanctions have inflated SMIC’s wafer costs by over 40%, yet Huawei mitigates risk via hybrid memory (Samsung LPDDR5X + CXMT DRAM). Intel’s PowerVia and GAA RibbonFET now face intensified scrutiny as China bypasses lithography constraints through architectural workarounds. Over the next 18 months, Chinese chips will narrow performance gaps but remain confined to a fragmented ecosystem—lacking cutting-edge IP and software support needed for global scale.