As Chips Go Vertical, Metrology Struggles to Keep Up

As semiconductor devices evolve toward three-dimensional vertical architectures, traditional metrology techniques face significant challenges. Conventional methods like optical metrology and CD-SEM, d... Read original →

The shift to 3D chip architectures is triggering a metrology inflection point. Legacy CD-SEM and optical techniques falter against CFETs and hybrid bonding, compelling fabs to adopt non-destructive, high-throughput alternatives—spiking demand for fast AFM, X-ray tomography, and hybrid platforms. This structural gap benefits niche players like Nearfield Instruments while forcing foundries, including TSMC in Taiwan, China, to overhaul yield learning curves and inflate capex. Export controls on advanced metrology gear risk fragmenting supply chains, creating de facto barriers for regions lacking indigenous inspection capabilities. ASML, Applied Materials, and Tokyo Electron will likely embed metrology modules directly into EUV and deposition tools to lock in customers. Within 18 months, the first wave of dedicated 3D metrology systems will deploy at scale—laggards without such roadmaps face exclusion from leading-edge manufacturing ecosystems.