Semiconductor News & Analysis Feed

In the face of traditional scaling limitations in the semiconductor industry, a breakthrough by a research team at the University of Illinois Urbana-Champaign introduces a novel approach to chip design through monolithic three-dimensional integration. By vertically stacking silicon device layers, th

Following Huawei's recent announcement of its Tau scaling technology, which claims to achieve transistor density comparable to 14 Angstrom (14A) manufacturing processes from leading chipmakers like TSMC and Intel, semiconductor analyst Dr. Ian Cutress has expressed skepticism. He argues that the ann

At IEEE ISCAS 2026 in Shanghai, Huawei's president He Tingbo unveiled 'Her’s Law' as China’s response to U.S. chip sanctions, replacing Moore’s Law. With access to EUV technology blocked, Huawei is leveraging advanced 3D stacking techniques like LogicFolding to achieve performance parity with Wester