Semiconductor News & Analysis Feed

This article delves into the data transmission bottleneck in modern AI computing, shifting focus from computational capability to data delivery efficiency. The analysis compares three leading memory architectures - HBC (High Bandwidth Cache), HBM (High Bandwidth Memory), and SRAM (Static Random Acce

This analysis explores the fundamental transformation in semiconductor industry driven by artificial intelligence, focusing on the concept of the AI memory wall. The article reveals that while computing progress was traditionally measured by processor performance over the past fifty years, modern AI

Qualcomm unveiled its breakthrough technology HBC (High-Bandwidth Compute) at its 2026 Investors Day, targeting the AI data center market to overcome the memory wall bottleneck. HBC employs a novel 3D-stacked chip architecture that integrates compute and memory closely, delivering significant improv

AMD's acquisition of MEXT marks a significant step toward addressing the growing memory bottleneck in AI computing. As AI models scale, memory has emerged as the primary constraint, particularly in data centers and high-performance computing environments. Traditional DRAM is increasingly costly and

As artificial intelligence advances, particularly with the widespread adoption of large language models (LLMs), demand for memory capacity and bandwidth is surging, placing unprecedented pressure on traditional memory architectures. The classic 'memory wall' concept, originally coined in the 1990s t

The global DRAM supply shortage has become a critical challenge for the semiconductor industry and AI development. Major producers like SK Hynix, Micron, and Samsung are investing heavily, but new fabs won't come online until at least 2027, with meaningful relief unlikely before 2028. Some experts p