Semiconductor News & Analysis Feed
3 articles
2026-06-25
digitimes.com
2026-06-25
Co-packaged optics (CPO) is rapidly emerging as a foundational architecture for next-generation AI infrastructure. With Nvidia's latest Scale-Up CPO switch roadmap now taking shape, bandwidth per AI rack is set to increase from approximately 130 TB/s in the Blackwell generation to more than 1 PB/s in the Feynman era, spanning Blackwell, Rubin, Rubin Ultra, and Feynman platforms. As a result, the g
2026-06-11
wccftech.com
2026-06-11
Wccftech
With multiple supply chain reports focusing on Intel's EMIB-T chip packaging technology, analyst Ming-Chi Kuo has shared that TSMC's next-generation packaging technology, CoPoS, will enter mass production in 2028. CoPoS, short for chip-on-panel-on-substrate, seeks to overcome the limitations of the current CoWoS (chip-on-wafer-on-substrate) packaging technology by increasing the area on which the
2026-06-01
www.tomshardware.com
2026-06-01
Tom's Hardware
PC Components CPUs
Nvidia lays out RTX Spark roadmap for laptops and desktop PCs at Computex 2026 — three generations outlined, Rubin with LPDDR6 memory, followed by Rosa Feynman
News
By Jeffrey Kampman published 1 June 2026
Nvidia is fully committed to transforming Windows on Arm into an agentic AI platform
(Image credit: Future)
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