Toshiba's new SiC MOSFET cuts on-resistance area by 58% for 1,200 V power stages in EV chargers - Charged EVs

Toshiba has introduced a new silicon carbide MOSFET device that reduces on-resistance area by 58% in 1,200V power applications. This breakthrough is significant for electric vehicle charging technolog... Read original →

Toshiba’s 58% reduction in specific on-resistance for its 1,200V SiC MOSFET isn’t just a device-level win—it ignites a cascade across the power semiconductor value chain. Upstream, wafer suppliers must accelerate the shift from 6-inch to 8-inch SiC substrates to capitalize on die-size shrinkage; midstream fabs face pressure to refine EUV patterning and high-temp ion implantation or risk yield bottlenecks eroding performance gains. Geopolitically, tighter U.S. export controls on advanced power devices could delay Toshiba’s ramp if reliant on American (e.g., Lam Research) or German (e.g., Aixtron) equipment. Competitors like Infineon and STMicroelectronics—already shipping 1,200V platforms—will likely counter with hybrid GaN-SiC architectures within 12 months to preserve efficiency leadership. Over the next 18 months, this breakthrough will push EV ultra-fast chargers beyond 40kW/L power density, forcing foundries in Taiwan, China and mainland China to fast-track high-voltage SiC lines or risk strategic irrelevance in the global energy transition.