The imec Report: Scaling Optical Interconnects For The AI Era

imec's report is not a technology roadmap—it is a structural challenge to the pluggable transceiver value chain. The core shift: optical engines migrating from board-level to package-level (CPO) forces InP lasers, SiN waveguides, and micro-lens arrays onto the same substrate as the switch ASIC. This re-bottlenecks the supply chain upstream (MOCVD epitaxy at Sumitomo, Lumentum) and downstream (CoWoS-class packaging at TSMC), while structurally compressing the optical-module-assembly layer where Innolight and Eoptolink hold share. Compliance exposure: InP wafers and high-end MOCVD tools remain under US export controls. If Chinese optical-chip players cannot establish independent InP epitaxy lines within 12 months, the chokepoint migrates from GPU to optical engine. Competitive dynamics: Broadcom's Tomahawk 6 already embeds CPO; NVIDIA's Rubin architecture will almost certainly follow. imec, as a non-profit, is positioning Europe to claim silicon-photonics foundry share against TSMC SOI and GlobalFoundries. Outlook: 1.6T pluggables remain dominant through 2025, but CPO penetration in AI clusters will exceed 15% by 2026. The paradigm being disrupted is not the transceiver vendor—it is the entire optical-electrical separation engineering model.