Space Industry Is Standardizing on RISC-V

As the space industry increasingly demands high-performance, low-power computing solutions, the RISC-V architecture is emerging as a dominant standard in space computing. At the 2026 RISC-V Summit Eur... Read original →

RISC-V’s standardization in space computing is triggering a full-stack overhaul—from instruction sets to radiation-hardened chip design. Upstream EDA and IP vendors will rapidly align with open architectures, while downstream AI payloads and 6G systems benefit from unified software stacks. For NASA and ESA, abandoning SPARC/PowerPC cuts licensing costs and sidesteps U.S.-EU export controls—especially critical as 7-nm rad-hard processes rely on TSMC (Taiwan, China). SpaceX leverages this shift to build proprietary in-orbit compute ecosystems, pressuring incumbents like Microchip to fast-track multi-core RISC-V chips such as the GR765. Within 18 months, RISC-V will evolve from optional to mandatory for deep-space missions, potentially fracturing global standards: an open U.S.-EU alliance versus regional closed alternatives. This isn’t an upgrade—it’s a power realignment.