Panel with Arteris, GF & Tenstorrent: RISC-V Ecosystem Growth for Physical AI

At the MIPS 'Physical AI is Agentic AI at the Edge' event in Taipei, Nitin Dahad of EE Times moderated a panel discussion titled 'RISC-V Ecosystem Growth for Physical AI,' featuring Gabriel Lin from A... Read original →

The rapid adoption of RISC-V in Physical AI is triggering a fundamental shift in chip design methodology. The synergy among Arteris’ interconnect IP, GlobalFoundries’ FDX process, and Tenstorrent’s heterogeneous architecture is driving edge AI SoCs toward a triad of compute density, power efficiency, and scalability—directly eroding ARM Cortex-M/A dominance in robotics and industrial embedded systems. Geopolitical tensions make open ISAs a strategic hedge against export controls, yet ecosystem fragmentation risks inflating validation costs, pushing firms to lock in toolchain partnerships early. NVIDIA and Qualcomm may counter by acquiring RISC-V IP firms or integrating RISC-V co-processors with their NPUs. Within 18 months, TOPS-per-watt will become the pricing benchmark for edge AI chips, and the first vertically optimized RISC-V Physical AI reference design could set the de facto entry standard for next-gen intelligent devices.