[News] MediaTek Reportedly Taps Intel Packaging Veteran After TSMC Hire, Advances Dual CoWoS–EMIB Strategy - TrendForce

MediaTek's back-to-back poaching of packaging veterans from TSMC and Intel is not a talent shuffle—it is a fabless giant executing supply-chain de-risking at the advanced packaging layer. CoWoS (silicon interposer) and EMIB (local bridge) are architecturally distinct: different interconnect densities, thermal profiles, and cost curves. By committing to both, MediaTek decouples its next-gen AI accelerators and automotive SoCs from any single foundry's roadmap. Upstream, Intel Foundry finally secures a volume design anchor, materially de-risking its 18A yield ramp. Downstream, MediaTek's delivery certainty for AI PC and datacenter silicon jumps significantly. On compliance, CoWoS capacity in Taiwan, China sits under dual pressure from export controls and geopolitical friction, while EMIB fabs are US-based. The dual-track is, in effect, packaging-level supply redundancy. The cost: maintaining two DRC rule sets and verification flows, adding 15-20% to NRE. Competitively, Qualcomm and Apple remain locked into TSMC's CoWoS. If MediaTek is first to qualify EMIB at volume, it captures a capacity head-start in the 2026 AI-chip window. Intel Foundry will almost certainly weaponize this win to erode TSMC's pricing power in advanced packaging. 12-24 month outlook: advanced packaging shifts from TSMC-exclusive capability to multi-vendor commodity. Fabless bargaining logic pivots from scarcity grabbing to architecture fit. If Intel lands 3-5 flagship design wins by 2026, its foundry narrative is rewritten.