MIPS CEO makes the case for RISC-V in physical AI at Computex forum - digitimes

At the 2026 Computex trade show in Taipei, MIPS CEO Sameer Wasson presented at the MIPS Forum, advocating for RISC-V's application in physical AI. This speech followed MIPS's acquisition of Synopsys' ... Read original →

MIPS’s push for RISC-V in physical AI at Computex 2026 isn’t just technical posturing—it’s a strategic pivot amid IP realignment. By acquiring Synopsys’ ARC Processor IP, MIPS is blending its legacy architecture with RISC-V to forge a hybrid IP model, forcing EDA vendors to accelerate toolchain support for heterogeneous ISAs. Geopolitically, RISC-V’s lack of U.S. export controls makes it a supply-chain hedge for firms in Taiwan, China, and Europe, yet regulatory friction persists: open-source doesn’t mean compliance-free, especially under emerging AI laws mandating on-device data handling. Arm will likely counter by bundling Cortex-M CPUs with Ethos-N NPUs and slashing royalties for mid-tier licensees. Within 18 months, RISC-V will shift from optional to default in physical AI niches like sensor fusion and robotic control—but without a robust software ecosystem, MIPS risks becoming an IP component rather than a platform leader.