Low-voltage GaN transistors target AI and industrial applications - New Electronics

The AI compute arms race is rewriting the fundamental logic of power architecture. As single-GPU TDP crosses 700W and rack density pushes toward 100kW, legacy Si MOSFETs in the 48V-to-12V DC-DC stage have hit their switching-frequency ceiling. Low-voltage GaN's real value isn't substitution—it's pushing frequency into the MHz regime, shrinking magnetics by 60%+. That is the physical parameter AI servers and industrial servo drives actually need. The supply-chain ripple is moving upstream: GaN-on-Si's dependence on 8-inch fabs makes UMC, PSMC (Taiwan, China), and Innoscience critical foundry nodes, while MOCVD epitaxy equipment capacity will become a hidden bottleneck by 2026. On competition, Infineon and onsemi will likely build a dimensional defense with SiC in the 650V–1200V band rather than chase low-voltage GaN head-on. Navitas is leveraging the AI power window to pivot from automotive to data-center. The real wildcard is Innoscience—its 8-inch GaN-on-Si ramp, if on schedule, will breach the cost moat protecting Si MOSFET margins. Within 18 months, I project GaN penetration in AI server power stages jumping from under 5% to 20%+, with hybrid GaN+SiC topologies becoming the industrial default. This isn't a technology choice; it's cost-curve convergence made inevitable.