Intel Fellow Ravi Mahajan on how EMIB and Advanced Packaging Drive Modern AI Computing - Technetbook

At a pivotal moment where transistor scaling alone can no longer meet the demands of modern AI computing, Intel Fellow Ravi Mahajan highlights how advanced packaging has emerged as a core enabler of c... Read original →

As transistor scaling hits physical limits, advanced packaging has shifted from a supporting role to the core enabler of AI chip architectures. Intel’s EMIB bypasses EUV constraints at sub-3nm nodes by embedding silicon bridges for heterogeneous integration—reshaping EDA workflows, substrate material specs, and forcing OSATs to upgrade to system-level capabilities. Geopolitical tensions amplify supply chain risks: U.S. CHIPS Act subsidies for domestic packaging clash with concentrated advanced test capacity in Taiwan, China, pushing IDMs toward vertical integration. While TSMC’s CoWoS remains capacity-constrained and Samsung bets on X-Cube, Intel’s Foveros+EMIB combo offers unique customization leverage. Over the next 18 months, glass substrates and co-packaged optics will enter pilot production; without industry-wide standards on thermal management and interconnects, packaging costs could erode Moore’s Law gains and widen the performance gap between leaders and followers.