Infineon Launches AURIX RC1, Its First RISC-V-Based Automotive Microcontroller Platform - ELE Times

Infineon's AURIX RC1 is not a product-line expansion—it is the first automotive-grade structural challenge to ARM's two-decade instruction-set monopoly in safety-critical MCUs. The technical ripple is immediate: RISC-V cores must now clear ISO 26262 ASIL-D full-chain validation, pushing SiFive and Andes (Taiwan, China) to deliver certified IP. Tier-1s like Bosch and Continental gain a genuine second-source option, while AUTOSAR CP toolchain and RTOS adaptation costs distribute across the ecosystem. Infineon is effectively redrawing the architectural boundary of automotive MCUs: RISC-V handles control logic, legacy cores retain safety-critical tasks—a heterogeneous multi-core paradigm. On supply-chain security, this aligns with the EU Chips Act's single-vendor dependency clause. However, if Infineon's RISC-V cores still rely on SiFive (US) licensing, geopolitical risk merely shifts from ARM (UK) to SiFive (US) without fundamental resolution. Competitively, NXP's S32 and ST's STM32 automotive lines will likely ship RISC-V counterparts within 12 months or lose pricing power in body-control and BMS segments. ARM's probable counter: accelerate automotive safety-extension ISA to lock in the installed base. The 24-month inflection point: whether the AUTOSAR consortium formally endorses RISC-V. If so, automotive MCU RISC-V penetration jumps from under 2% to 8–10%, making multi-ISA parallelism irreversible.