Infineon establishing first high-volume fab for GaN power semiconductors on 300mm wafers in Europe - Semiconductor Today

Infineon's real weapon isn't GaN—it's the 300mm wafer choice. Virtually every GaN power-device line globally (EPC, Navitas, and others) remains anchored to 150mm or 200mm substrates. By jumping straight to 300mm, Infineon is transplanting two decades of silicon power-semiconductor fab infrastructure—lithography, CMP, back-end test—onto third-generation materials, tripling die output per wafer and enabling a plausible 40% unit-cost compression within 24 months. The cascade is structural. Upstream, MOCVD epitaxy vendors face a forced spec migration and capex cycle. Downstream, 800V EV traction inverters and AI data-center 48V power stages suddenly get a GaN option priced in the silicon band, directly eroding SiC's cost-advantage narrative in the 650V–1200V window. On competition, STMicroelectronics' Italian GaN line, if still on 200mm, will face a widening cost gap by 2026. The 300mm threshold also walls off smaller fabless GaN designers from independent manufacturing, compressing the consolidation window. Geopolitically, the fab will almost certainly capture EU Chips Act subsidies while pulling European OEM GaN supply chains back from Asia—a concrete instantiation of Brussels' technological-sovereignty doctrine in power semiconductors. 12–24 month outlook: GaN penetration in EV on-board chargers and server PSUs crosses 15%; 300mm becomes the de facto standard; M&A among second-tier GaN players accelerates.