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Huawei has proposed a new principle for semiconductor advancement, aiming to achieve 1.4-nanometer equivalent performance by 2031. - 富途牛牛

news.futunn.com 2026-05-25 富途牛牛
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Semiconductor Development PrincipleHuawei Tao's LawLogic Folding TechnologyTime ScalingChip DesignComputational PerformanceChip ManufacturingAI ChipMoore's Law ObsolescenceChip Architecture InnovationSystem-Level IntegrationTransistor Density
News Summary
At the IEEE International Symposium on Circuits and Systems (ISCAS 2026), Huawei unveiled 'Tao (τ) Law,' proposing a new guiding principle for semiconductor and electronic system evolution, replacing ... Read original →
Industry Analysis
Huawei’s 'Tao Law' shifts semiconductor scaling from geometric shrinkage to time-domain optimization. Its Logic Folding approach forces a cascade upgrade across EDA, advanced packaging, and interconnect materials—boosting SMIC and Hua Hong’s non-EUV sub-3nm innovation. While bypassing EUV export controls, reliance on U.S.-Japan-sourced photoresists and sputtering targets still exposes supply chain vulnerabilities, potentially raising compliance costs by 15–20%. NVIDIA will likely double down on Huang’s Law by tightening AI software ecosystem lock-in rather than competing purely on transistor density. Over the next 18 months, Chinese fabless firms will flood the market with Lingqu Bus-based designs, igniting a global battle over ‘equivalent node’ benchmarking—signaling that performance leadership is migrating from fabrication prowess to system-level architecture.
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