Could Google's Next TPU Shift Back to TSMC? Inside the EMIB vs. CoWoS Battle｜Industry｜2026-06-15｜web only - 天下雜誌

Google's next-generation TPU chip manufacturing decision has once again drawn industry attention, particularly regarding whether it will return to TSMC. This choice reflects not only technical route s... Read original →

If Google shifts its next-gen TPU back to TSMC (Taiwan, China), it will trigger a cascade in advanced packaging adoption. While EMIB offers superior power efficiency, CoWoS—paired with 3nm EUV and silicon interposers—better meets the compute density demands of large-scale AI training. This move pressures Intel to accelerate Foveros Omni commercialization and may prompt NVIDIA to further lock in CoWoS capacity for GB200 NVL72 systems. Geopolitically, tightening U.S. CHIPS Act stipulations on domestic content expose Google to export control scrutiny and supply chain fragility if overly reliant on Taiwan-based manufacturing. Over the next 18 months, advanced packaging will dominate AI chip competition: TSMC’s CoWoS capacity is booked into 2027, and without breakthroughs in interconnect density and yield, Intel and Samsung risk exclusion from the high-end AI foundry ecosystem.