AVL and VisIC Advance GaN-Based EV Inverters to Improve EV Powertrain Efficiency - ELE Times

The AVL-VisIC collaboration is less a supplier tie-up and more a structural repositioning in power semiconductors. As 800V architectures migrate from flagship to volume models, SiC's vertical structure is hitting its switching-loss ceiling. GaN's lateral channel topology, with inherently lower parasitic capacitance above 1 MHz, becomes the differentiator. VisIC's GaN-on-Si approach sidesteps capital-intensive substrate epitaxy, positioning inverter BOM costs at roughly 70% of SiC equivalents by 2026. The ripple effect is non-trivial: GaN gate-drive topologies demand re-architecting. Legacy SiC dv/dt margin designs become obsolete; PCB parasitic inductance sensitivity climbs an order of magnitude, forcing a ground-up redesign of motor-controller hardware. Thermal management must also adapt to GaN's more concentrated heat-flux density. Competitively, Infineon and STMicroelectronics are locked into heavy-asset SiC fabs and cannot pivot quickly. onsemi and ROHM, with existing GaN power-device roadmaps, are the most credible fast-followers. Chinese OEMs and Tier-1s completing automotive-grade GaN inverter validation by 2025 would erode the European cost premium almost overnight. The 12-24 month inflection point is not technical maturity but the race between AEC-Q101 certification cycles and wafer-fab ramp. Whether GaN secures volume production nominations from major OEMs by Q3 2026 will determine if this trajectory becomes a genuine second curve or remains a laboratory curiosity.