ASE expands PowerSiP platform to improve AI data center power efficiency

The real bottleneck in AI compute has shifted from transistors to joules. ASE compressing voltage regulation from board-level discretes into a 3D package body is a structural redefinition: power management is no longer a system-architecture problem but a packaging-process problem. This cascades upward—GaN and SiC power devices must be re-engineered for stacked thermal constraints—and downward, forcing server OEMs to iterate backplane topologies and copper interconnect specs. On risk: ASE's capacity is concentrated in Taiwan, China, creating a single-point dependency for US-based AI chip customers amid tightening export controls. Amkor, as the US-domestic OSAT, will almost certainly accelerate a parallel 3D power-packaging roadmap. Infineon may extend from IDM into the OSAT layer to contest power-integration ground. 12-to-24-month call: AI data-center power spend will breach 35% of total OPEX. Compute per watt will displace FLOPS as the primary procurement metric. 3D power packaging transitions from differentiator to entry ticket, and the OSAT sector will undergo a consolidation wave axis-aligned on power density.