Andes Waits For Market Momentum For Cuzco CPU

Andes shelving Cuzco is not a strategic pause—it is an honest admission that the high-end RISC-V ecosystem lacks a self-reinforcing flywheel. The technical ripple is immediate. Domestic SoC designers who invested in microarchitecture adaptation, compiler tuning, and verification IP around Cuzco now face unrecoverable sunk costs. More critically, the "last mile" of high-performance RISC-V—deep OS scheduler optimization, virtualization layers, memory management—still lacks a credible reference implementation to anchor the toolchain. That vacuum extends at least 18 months. The "business considerations" framing almost certainly masks geopolitical friction. As a mainland-based IP house, Andes' high-end customers must weigh US export-control spillover risk before committing to volume orders. Customers will not place large bets; the IP vendor will not mass-produce. A classic trust-spiral deadlock. Competitively, SiFive's P870 and X280 continue advancing but face the same ecosystem gap. ARM will likely treat this as moat validation—its strategy is "time for space," leveraging software inertia to lock in mobile and server customers for the next 24 months. 12-to-24-month outlook: RISC-V penetration in embedded and AI-accelerator segments will keep climbing, but high-end general-purpose computing will suffer an ecosystem fault line. Andes will almost certainly redirect R&D toward mid-range cores and domain-specific accelerator IP. Cuzco's realistic revival window is 2027, contingent on the Linux kernel community and major cloud providers committing to a concrete high-performance RISC-V roadmap.