Agentic AI Explores Heterogeneous Chip and Interconnect Architectures (Argonne, UIUC)

This isn't academic pre-research—it's an early signal that heterogeneous chip design is shifting from human-driven EDA to AI-agent autonomous exploration. The cascade is structural. When an agentic system simultaneously optimizes GPU, RISC-V, and dataflow processor topologies while trading off HBM versus GDDR ratios, the workflow lock-in held by Synopsys and Cadence erodes. RISC-V entering a US national lab's AI framework turns 'de-ARM-ification' into engineering reality—AI agents compress RISC-V microarchitecture trial costs, and the IP-licensing moat is being filled by algorithms. Supply chain: US national lab leadership plus RISC-V's open-source nature means HBM suppliers face demand fragmentation. AI agents generating workload-specific memory hierarchies break the one-size-fits-all HBM procurement logic. Market: NVIDIA will likely extend CUDA-X into the design side within 12 months. ARM faces the sharpest structural threat—if agents replicate Cortex performance on RISC-V, its licensing model loses its foundation. EDA giants must pivot from selling tools to selling agents, or their valuation gets rewritten. Outlook: Within 18 months, first AI-agent-designed commercial chips appear in DPU and edge inference. Within 24 months, design cycles shorten 30-40%. The long-tail effect: design capability shifts from scarce resource to callable service, redefining survival for mid-tier chip companies.