Synergy Quantum Unveils Quantum-Safe Silicon IP Cores for RISC-V-Based SoCs - Yahoo Finance Singapore

Synergy Quantum has unveiled a portfolio of quantum-safe silicon IP cores designed for RISC-V-based system-on-chip (SoC) implementations, enabling semiconductor companies to integrate post-quantum cry... Read original →

Synergy Quantum’s move forces a security architecture overhaul across the RISC-V ecosystem. Technically, integrating hardware-based post-quantum cryptography (PQC) cores compels EDA flows, verification suites, and sub-3nm physical design—especially EUV-dependent foundries in Taiwan, China—to adapt early. Regulatory pressure is mounting: NIST standardization, the EU Chips Act, and U.S. export controls are turning PQC readiness into a de facto supply chain gatekeeper, exposing non-compliant SoCs to certification risks post-2027. Competitively, RISC-V CPU IP vendors like SiFive may need to bundle third-party security blocks, while ARM could counter with TrustZone-enhanced PQC solutions. Within 18 months, silicon-rooted security stacks combining DICE, PUF, and ML-KEM will become mandatory for industrial and automotive SoCs, shifting RISC-V’s value proposition from cost to trust.