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Organised by the School of Electrical and Electronic Engineering and supported by semiconductor firm EnSilica and a number of industry sponsors, the initiative used the Tiny Tapeout framework to deliver practical ASIC design experience. The approach, which uses a multi-project wafer (MPW) model, enables multiple designs to be manufactured together at reduced cost.According to organisers, the event

As demand for high-performance AI chips rises, competition for 3nm and below fabrication capacity, along with advanced packaging technologies such as 2.5D and 3D integration, is becoming increasingly intense.One of the most persistent bottlenecks has been in advanced packaging, especially chip-on-wafer-on-substrate (CoWoS) technology. Shortages have extended beyond fabrication itself, affecting up

Home技術議題研究摘要Why Consumer Electronics Will Continue to Lead the Edge AI Chip MarketWhy Consumer Electronics Will Continue to Lead the Edge AI Chip Market2026年2月25天Latency, energy, privacy. By shifting AI computation from the cloud to the edge, these issues can be alleviated. 2025 was a breakout year for many AI applications, with consumer electronics leading the way in revenue due to the trend towa

Introducing STM32C5 in India, STMicroelectronics explained how the new series targets cost-sensitive applications with improved performance, memory, and connectivity.

Why transatlantic execution, not transatlantic symbolism, now matters to the electronics and semiconductor supply chain.

Samsung Electronics is facing a new shift in labor relations after the Samsung Electronics branch of the Samsung Group Super-Enterprise Union reportedly lost its status as a majority union following a sharp drop in membership after bonus negotiations. The move weakens the union's representation and could further fragment future labor talks and union power at Samsung Electronics.