The next mobile chip race is about moving memory off the processor stack, not just shrinking process nodes.
Determining whether next-gen flagships sustain high frequencies may depend less on TSMC's 2nm node and more on memory placement.
DigiTimes reports Qualcomm plans to adopt Samsung's Heat Path Block (HPB) structure or an equivalent design for the Snapdragon 8 Elite Gen 6 series, per unconfirmed supply chain leaks.
Samsung's Exynos 2600 product page confirms the first mobile SoC use of HPB with High-k EMC, reducing thermal resistance by up to 16%.
Samsung's technical specs detail shrinking DRAM size, applying HPB, and using High-k EMC to direct heat, formally named FoWLP_HPB (Fan-Out Wafer-Level Packaging with Heat Path Block).
Maximum thermal resistance reduction
Power consumption increase over previous generation
5GHz
Rumored target frequency
These figures reflect Samsung's thermal improvement, Snapdragon 8 Elite Gen 5's 61% higher power draw, and the rumored 5GHz target, indicating frequency goals are consuming the efficiency curve.
Where the heat gets stuck
For decades, mobile chips used PoP (Package-on-Package) stacking memory directly above the processor to minimize signal paths to hundreds of microns, saving power and latency.
The cost is heat: processor heat must pass through the memory layer above, which blocks and traps heat; manufacturers have relied on external solutions like vapor chambers and graphite, which spread heat but do not ease its escape.
As power density rises, external solutions hit limits: Snapdragon 8 Elite Gen 5 beats Apple A19 Pro in Geekbench 6 multi-core but consumes 61% more power, showing vendors trade peak performance for higher power when thermal paths are restricted.
After moving memory to the side
HPB moves memory from directly above the processor to its side and places a copper block directly on the silicon. Heat no longer has to pass through the memory layer; it conducts upward directly through the copper. According to Samsung, this shorter path reduces thermal resistance by up to 16%.
A 16% reduction is significant for thermal materials but modest for process node advancement. The value lies in the variable being changed: previous smartphone thermal optimizations were done outside the package, whereas this change targets the package itself. When external space is constrained by device thickness, the package becomes the only remaining area for optimization.
Samsung has implemented a complementary design layer. According to its official video, the Exynos 2600 also adopts a new interposer and a redesigned redistribution layer (RDL), the latter directly serving to reduce chip thickness. As the chip becomes thinner, the distance from the die to the thermal structure also shortens—these changes are complementary, not independent selling points.
Third-party testing on the Galaxy S26+ compared the thermal behavior of this chip, concluding that its sustained performance is more stable than the previous generation, though the device's vapor chamber area is smaller than that of the top-tier model in the same series. The test equipment used an external fan rather than liquid nitrogen—a detail indicating the issue is real: within this device volume, the margin available from passive cooling is already limited.
Why It Is Willing to License the Technology
According to reports, Samsung intends to license this structure to other chipmakers, with Qualcomm and Apple on the potential list. It seems counterintuitive for a company to sell its most notable flagship chip thermal improvement to others, but it makes sense within Samsung's business structure: the System LSI division designs the chips, while a separate business line handles packaging and foundry services, the latter of which is more in need of customers.
Samsung's position on 2 nanometers is public. In the earlier 3 nanometer process, yields remained low for an extended period, causing the Galaxy S25 series, originally planned for in-house chips, to switch entirely to Qualcomm processors. The Exynos 2600, manufactured using the 2 nanometer GAA process and marked as in mass production on the official website, serves as a sample for the foundry line. If HPB is adopted by external customers like Qualcomm, it proves not only thermal capability but also the deliverability of the packaging step.
However, this part remains speculative. It is not yet determined how Qualcomm will implement it: whether to outsource to Samsung for native integration, license the structure while continuing production at TSMC, or develop an equivalent solution in-house. No party has provided a clear answer. The rumored 5GHz frequency for the next-generation performance core is also unconfirmed.
Sustained performance improvements in next-generation flagships will primarily come from packaging and thermal conduction structures, with new process nodes ranking lower in priority. This judgment is easily falsified: if next year's new models show thermal improvements mainly from larger vapor chamber areas or material changes, while the packaging structure remains unchanged, it will indicate that the current trend has been overestimated.