Copper cannot scale to the distances required by modern AI clusters. As data volume grows faster than electrical interconnect efficiency, optical links are emerging as the necessary solution for multi-rack architectures.

Replacing copper wiring between dies with fiber optics is fundamentally a solution to the problem of distance.

October 04, 2026  ·  originally in Chinese

Optical Interconnects Replace Copper to Solve AI Cluster Distance Limits

Copper cannot travel that far. This has long been the argument for optical interconnects, but the real trigger is more specific: as AI clusters scale from a single chip to a rack, and then to multiple racks, the growth rate of data transfer between chips has outpaced improvements in power efficiency and density for electrical interconnects.

Copper cannot travel that far. This has long been the argument for optical interconnects, but the real trigger is more specific: as AI clusters scale from a single chip to a rack, and then to multiple racks, the growth rate of data transfer between chips has outpaced improvements in power efficiency and density for electrical interconnects.

At ECOC 2026 in Malaga, Spain, Lumentum, Qualcomm Technologies, and Corning conducted a joint board-level demonstration. The division of labor was clear: Qualcomm provided the die-to-die interface IP subsystem, Lumentum supplied the optical engine based on 1060nm VCSELs, and Corning provided the multimode fiber glass ferrules. The demonstration was held at Lumentum’s Booth 2050 and Qualcomm’s Booth 1050.

01 What Problem Does This Path Solve?

Standards like UCIe address interconnects between chips within a package, where physical distances are short enough for electrical signals to remain viable. However, once the scope expands beyond the package—chip-to-chip on the same board, or board-to-board within a rack—signal loss and power consumption curves become problematic. For every increment in distance, the bandwidth achievable at a given power level drops.

This demonstration moves the connection onto multimode fiber. The optical channels operate at 32 Gb/s NRZ, with an architecture designed to support a shoreline bandwidth density of approximately 1 Tb/s/mm today, targeting approximately 4 Tb/s/mm. Lumentum’s optical engine provides approximately 10 Tb/s of total transmit and receive capacity, utilizing 2D VCSEL and photodetector arrays along with back-illuminated lens technology.

32Gb/s

Single-channel rate

1→4

Tb/s/mm shoreline density

10Tb/s

Optical engine transmit/receive capacity

Lumentum CTO Matt Sysak describes the 1060nm VCSEL platform as a move to push high-density optical interconnects closer to AI compute. The choice of wavelength has a practical rationale often overlooked: Lumentum's 3D sensing business already mass-produces 1060nm VCSELS at scale, meaning capacity and packaging processes are ready. For optical interconnects to scale, manufacturing infrastructure matters more than lab performance metrics.

Corning's role centers on fiber density. Claude Echahamian, Vice President and General Manager of Emerging Business and EMEA at Corning Optical Communications, notes that as optical links move closer to compute devices, fiber connections must account for density, precision, and scalability. In the space near packaging, connector size, alignment precision, and manufacturability become system-level design issues. The three demonstrated components each handle a specific segment.

First, the interface: Qualcomm's D2D interface IP organizes electrical signals from compute chiplets into a format suitable for direct-drive optical devices, while reducing power and area. Second, optoelectronic conversion: Lumentum's VCSEL and photodetector arrays shift signals from electrical to optical. Third, physical connection: Corning's multimode fiber and glass ferrules handle transmitting and receiving light. If any of these three segments underperforms, the overall link density cannot scale.

03 How far is it from productization

It is important to clarify: this is a proof of concept, and none of the three companies have announced a commercial timeline. The demonstration was performed at the board level, targeting future implementation paths for co-packaged optics (CPO) and near-packaged optics (NPO). At this stage, it proves the principle works.

This path did not emerge out of thin air. Lumentum previously demonstrated high-density 1060nm VCSEL arrays co-packaged with a master ASIC at OFC earlier this year, targeting protocols including UCIe and PCIe. This time, integrating Corning's fiber connections and Qualcomm's interface IP fills the gap in the 'from silicon to fiber' segment.

Here is a verifiable or falsifiable judgment: optical D2D will not appear on the backplanes of mass-produced switches within three to five years. Its first deployment scenario will be short-distance board-to-board connections within chassis. The reason is that backplanes face maintainability and field replacement issues—how to replace a broken fiber and who does it—which can be bypassed by modular design inside a chassis but not on a backplane. If a commercial rack-level backplane product based on optical D2D appears before 2028, this judgment is invalid.

Stepping back, the combination itself reveals an industry trend: interface IP from one company, optical engine from another, and fiber connection from a third. The optical interconnect supply chain is organizing around a three-segment division of labor: interface / optoelectronics / connection. The day this division of labor becomes clear is the day volume production begins.

See you in the comments. If optical D2D truly makes its way into advanced chassis, which interconnect segment will be the first to be replaced: chip-to-chip on-board traces or board-to-board connectors?