The global semiconductor industry is undergoing a structural fracture. On one side, manufacturing capacity is concentrating more intensely than ever around a handful of advanced nodes—TSMC (Taiwan, China) alone accounts for over 90% of 3nm production, while Samsung and SK Hynix dominate the emerging HBM4E high-bandwidth memory market. On the other, chip design activity is rapidly decentralizing toward Southeast Asia, Eastern Europe, and even Latin America. This dual-track dynamic—manufacturing consolidation paired with design dispersion—is redrawing the technological power map of the AI era.
The risks of over-concentration have triggered alarms across multiple governments. South Korea’s BusinessKorea recently ran a feature titled “Warning Lights,” highlighting how global reliance on Korean firms for memory chips has become dangerously lopsided. In 2025, Samsung Electronics and SK Hynix together controlled over 85% of the global HBM market, while TSMC held more than 90% of sub-7nm logic foundry capacity. Such extreme concentration leaves the supply chain vulnerable to geopolitical shocks or natural disasters. As Lam Research’s CEO bluntly stated: “New fabs alone won’t solve bottlenecks—the real constraints lie in equipment lead times, talent density, and ecosystem coordination.”
Yet this concentration is not immutable. While the U.S.-Japan-South Korea trilateral alliance seeks to fortify its hold on advanced manufacturing, its exclusivity is inadvertently accelerating alternative pathways elsewhere. Malaysia has emerged as a pivotal node in this shift. Leveraging its established back-end manufacturing base, English-speaking engineering talent, and investor-friendly policies, Malaysia is not only attracting expanded investments from Intel and Infineon but also spearheading regional chip design collaborations with Vietnam and Thailand. Vietnam, for its part, has enshrined semiconductor design as a pillar of its national digital strategy, aiming to train 10,000 IC engineers by 2030. This “light on manufacturing, heavy on design” model sidesteps the capital intensity of fabrication and instead targets the intellectual property layer of the value chain.
Simultaneously, the evolution of AI chip architectures themselves is reshaping supply dynamics. NVIDIA’s recent decision to separately report CPU revenue signals growing traction for its Vera CPU platform among cloud providers—a move that directly benefits Samsung and SK Hynix through heightened demand for LPDDR5X memory in AI inference servers. Even more telling is the Anthropic-Microsoft infrastructure deal, which could catalyze broad demand for custom ASICs optimized for specific AI workloads. These chips may not require cutting-edge nodes but prioritize power efficiency and algorithm-specific acceleration, opening doors for foundries like SMIC and GlobalFoundries.
I judge that the next three years will be decisive for whether decentralized design ecosystems can achieve critical mass. Today, Southeast Asia remains heavily dependent on U.S.-based EDA tools and IP licensing, limiting true design autonomy. But if open-source architectures like RISC-V converge with localized talent pipelines, regional hubs could spawn specialized chip companies targeting edge AI and industrial IoT—segments less reliant on bleeding-edge process nodes.
This won’t dethrone TSMC or Samsung’s manufacturing dominance, but it will erode their control over the entire value chain. The pressing question is this: as AI chips evolve not from a single tech giant but through a distributed network of global design centers, will innovation accelerate—or fragment into incompatible standards that slow progress? The answer hinges on whether the industry can strike a new balance between open collaboration and intellectual property protection within the next half-decade.