NVIDIA’s market capitalization has surged past $4.8 trillion, making it the world’s most valuable company. Yet its stock has consistently declined after earnings announcements—despite a 73% gain over the past year, shares dropped sharply following Q2, Q3, and Q4 results. This paradox reflects growing investor skepticism: while AI chip demand appears boundless, physical constraints in manufacturing are tightening faster than anticipated.
The crux lies in the 3nm process node. As the most advanced volume-production technology today, 3nm dictates the power efficiency and transistor density of next-generation AI accelerators. It is the linchpin for NVIDIA’s Blackwell platform and the upcoming Rubin architecture. And there is only one supplier capable of mass-producing 3nm chips at scale: TSMC in Taiwan, China. In early 2026, TSMC reported a 30% year-over-year revenue increase in the first four months, driven overwhelmingly by AI. April alone brought in $12.6 billion—a figure underpinned by NVIDIA reportedly occupying nearly 70% of TSMC’s 3nm CoWoS advanced packaging capacity.
But capacity is finite. Extreme Ultraviolet (EUV) lithography tools, essential for 3nm production, have an 18-month lead time. ASML can deliver only about 50 EUV machines annually, and each 3nm production line requires dozens. Even with aggressive expansion, TSMC’s total 3nm wafer output in 2026 is projected to reach just 2 million equivalent 300mm wafers—far short of what exponential growth in AI training clusters demands. I judge that by late 2026, 3nm will become the true bottleneck in AI infrastructure deployment, not algorithms or software.
This scarcity is reshaping the NVIDIA-TSMC relationship. Historically, NVIDIA held pricing leverage as the dominant customer. Now, TSMC—armed with irreplaceable manufacturing capability—is evolving from a foundry into a “gatekeeper of compute.” The two companies have entered an implicit co-governance model: NVIDIA locks in capacity two years ahead and even pre-pays for equipment; TSMC, in turn, customizes process modules and adjusts yield targets to prioritize AI chip deliveries. While this deep integration secures supply, it also concentrates systemic risk—any yield fluctuation or geopolitical disruption could stall the entire AI industry.
This hyper-concentration is spurring alternative pathways. Southeast Asia is emerging as a design-centric hub, leveraging outsourced engineering and localized testing/packaging to build a “manufacturing-light” AI chip ecosystem. At SEMICON SEA 2026, multiple Chinese semiconductor firms announced AI design centers in Vietnam and Malaysia, focusing on optimizing inference chips on mature nodes like 7nm or 28nm. Though these cannot replace 3nm for training workloads, they offer strategic relief as AI shifts toward edge inference—where power efficiency and cost matter more than peak performance.
NVIDIA is already adapting. Its newly launched Llama inference chip uses TSMC’s 4nm process instead of 3nm—a pragmatic response to capacity pressure. But this is a stopgap. The deeper challenge is whether AI compute can sustain its current growth trajectory under dual constraints: physics and geopolitics.
The answer is increasingly no. 3nm is not the end—but it is an inflection point. It marks the shift from a “performance-at-all-costs” era to one prioritizing efficiency and availability. TSMC’s allocation authority over 3nm wafers has become a more critical strategic asset than GPU architecture itself. If NVIDIA fails to embed manufacturing resilience into its ecosystem—through investments in packaging, second-source partnerships, or chiplet architectures that reduce reliance on a single node—its dominance will face tangible erosion beyond 2027.
The question is no longer “Who can build the most powerful AI chip?” but “Who can extract the most effective compute from every scarce 3nm wafer?” That may well be the new Moore’s Law of the AI age.