Untangling Chip Traffic Jams

semiengineering.com 2026-07-23 Liz Allan

Entities

Companies:Cadence Axiomise Synopsys Arteris Vinci

People:Mick Posner Ashish Darbari Frank Schirrmeister Andy Nightingale Matt Commens Satish Radhakrishnan

Technologies:NoC cache coherency formal verification multi-physics simulation AMBA CHI C2C chiplet-to-chiplet

Tags

Network-on-Chip NoC Chip Interconnect Cache Coherency Chip Verification Multi-die Integration Thermal Management Interconnect Design AI Accelerators Chip Manufacturing System-level Design Power Analysis

News Summary

As chip designs grow increasingly complex, Networks-on-Chip (NoCs) are facing unprecedented challenges, particularly in multi-die and chiplet architectures. Ensuring efficient and coherent data flow a... Read original →

Industry Analysis

__fail__

Read Original Article →

This page displays AI-generated summaries and metadata for research purposes. Original content belongs to the respective publishers.