TSMC to start using High-NA EUV lithography in 2030

TSMC plans to begin using High-NA EUV lithography in 2030, marking a significant technological upgrade in its advanced manufacturing roadmap. While TSMC had previously avoided public commentary on thi... Read original →

The adoption of High-NA EUV marks a transformative shift in chip manufacturing, fundamentally reshaping the capacity constraints of advanced nodes. TSMC’s move propels ASML to accelerate lithography innovation, while forcing the global photomask supply chain to transition toward 6×12-inch formats, creating a technological cascade. From a policy standpoint, this advancement intensifies strategic competition between the U.S. and China, particularly affecting cross-strait cooperation in high-end manufacturing. In market dynamics, if Intel and Samsung follow suit, TSMC could solidify its leadership in advanced process nodes. Looking ahead, the widespread adoption of CFETs and GAA architectures will heavily depend on stable High-NA EUV supply, with early adopters likely to gain substantial competitive advantages in the post-2030 landscape.