TSMC targets 2029 for panel-level CoPoS packaging in AI chip push - DigiTimes - Investing.com

TSMC is advancing its strategic positioning in the AI chip market by targeting commercialization of panel-level CoPoS (Chip on Panel System) packaging by 2029. This packaging technology represents a s... Read original →

TSMC’s 2029 target for panel-level CoPoS isn’t just packaging—it’s a preemptive strike against AI chip scaling limits. This move pressures upstream substrate suppliers to deliver ultra-flat, low-CTE glass or composite panels while forcing downstream system designers to overhaul thermal and signal integrity architectures. Geopolitically, over-concentration of such advanced capacity in Taiwan, China heightens supply chain fragility under U.S.-China tech decoupling, likely accelerating TSMC’s costly overseas fab diversification. Against Intel’s Glass Core and Samsung’s I-Cube, CoPoS aims to lock in NVIDIA and AMD with unmatched integration density, squeezing competitors’ runway. Within 18 months, though commercial volume remains distant, CoPoS signals a tectonic shift: advanced packaging is evolving from performance enhancer to architectural determinant—those mastering panel-level yield will dictate the next AI hardware era.