TSMC mulls making advanced chips - The Manila Times

TSMC's Southeast Asian advanced-node play is fundamentally a geopolitical hedge, not a capacity expansion. In the Manila context, 'advanced' most likely anchors to sub-7nm logic or CoWoS-class packaging, which forces ASML and Lam Research to replicate service infrastructure southward, splitting the photoresist and 12-inch wafer supply chain into a second corridor. On compliance, US export controls have pushed Taiwan, China's domestic fabs to a single-point-of-failure threshold; the Philippines sits precisely in the friend-shoring grey zone—neither ally nor adversary, yet with genuine semiconductor policy ambition and a cost structure favorable to advanced packaging lines. Competitively, Samsung's P3 and Intel's 18A were quietly betting on TSMC's geographic concentration to siphon overflow customers; that thesis is now structurally undermined. The real variable over the next 18 months is not node shrinkage but geographic redundancy in advanced packaging. Whoever locks in distributed CoWoS capacity controls the pricing leverage on AI compute silicon. The Manila headline is a canary: the next decade of semiconductor geopolitics will be written in packaging-fab siting decisions, not lithography tool roadmaps.