TSMC considers entering 3D DRAM at NVIDIA's request - igor´sLAB

This is not a product-line extension—it is a structural fracture in the semiconductor value chain. Technical cascade: 3D DRAM's vertical-stacking architecture is fundamentally closer to 3D NAND than to planar DRAM. TSMC's SoIC and CoWoS capabilities allow memory stacks to be integrated directly atop logic dies, creating a 'memory-as-logic' paradigm. NVIDIA's HBM demand has already breached the production ceiling of Samsung, SK Hynix, and Micron. This move weaponizes the foundry lock-in to bypass memory supply constraints. Compliance risk: If sub-10nm logic integration is involved, US BIS export-control scope expands materially. Advanced packaging lines in Taiwan, China face dual pressure from equipment access and export compliance, structurally raising operating costs and deepening supply-chain concentration risk. Competitive response: SK Hynix, the current HBM leader, will almost certainly accelerate its 3D DRAM roadmap. Samsung may counter with vertical-integration leverage. Micron risks retreating into niche segments. The memory oligopoly faces an existential shock. 12–24-month tail: The first foundry-integrated memory products will ship. DRAM pricing shifts from commodity to custom. NVIDIA's bargaining power over the memory stack undergoes a qualitative change. The birth of 'memory foundry' as a new category signals the formal dissolution of the thirty-year logic-memory separation that defined the industry.