TSMC chair says CoPoS could scale within years while downplaying risk from Terafab - digitimes

Taiwan Semiconductor Manufacturing Co. (TSMC) informed shareholders on June 4 that the AI boom is creating significant opportunities, but also placing the bulk of investment and operational burden on ... Read original →

TSMC's push into CoPoS isn't optional—it's a direct response to the physical limits of scaling below 3nm. As transistor-level gains diminish, advanced packaging becomes the new battlefield for Moore’s Law extension, reshaping demand across EDA, substrate materials, and test equipment. Geopolitically, Taiwan, China’s concentration of cutting-edge capacity deepens U.S. reliance under the CHIPS Act but also centralizes systemic risk. By downplaying Intel’s Terafab threat, TSMC signals confidence in its technology gap: if CoPoS scales within 24 months, it locks in NVIDIA and others for next-gen AI architectures. Within 18 months, packaging will shift from a back-end process to a strategic differentiator—fabs lacking heterogeneous integration capabilities risk exclusion from the high-end AI supply chain.