Teradyne And Tokyo Electron Target AI Chiplet Test As Adoption Watchpoint - Yahoo Finance

Teradyne and Tokyo Electron have jointly developed an integrated test solution for AI and data center devices, targeting the growing demand for chiplet-based architectures and advanced packaging. By c... Read original →

The rise of chiplet architectures is forcing test and packaging workflows to converge. Teradyne and Tokyo Electron’s integrated cell isn’t just hardware bundling—it redefines validation logic for advanced packaging by fusing UltraFLEXplus’s high-power parallel testing with Prexa SDP’s thermal precision, directly tackling yield ramp challenges in 3D-stacked AI chips. This pressures Advantest to accelerate V93000 co-validation with OSATs, while KLA and Applied Materials may counter with combined defect inspection and electrical test solutions. Geopolitically, reliance on EUV-enabled processes exposes the offering to U.S. export controls, raising compliance costs for customers in Taiwan, China and Hong Kong, China. Over the next 18 months, embedding standardized test interfaces into HBM4 and CoWoS-R ecosystems will be the decisive long-tail lever for Teradyne to lock in premium market share.